Physical Design Implementation of 41 Tap FIR Filter Using Open-Source Tools and Skywater 130nm PDK

The presented design encompasses a 41-tap Finite Impulse Response filter that serves distinct functions in image processing as well as wireless communication, radar, control systems, and biomedical signal processing applications. The filter incorporates the prime number 41 as an operative coefficient to minimise recurring errors along with unwanted frequency response patterns for better signal speed and quality. The selected number achieves an optimal relationship between processing speed and signal quality, which makes it appropriate for real-time and high-performance systems. The design based on Skywater 130nm CMOS technology depends fully on open-source tools, which include Openlane, OpenROAD, Magic, Klayout, Netgen, and Yosys for implementation. The design starts from Verilog implementation, ending at GDSII production. The design fulfills requirements for both DRC and LVS standard verification testing. The implemented layout consists $642151 \mu \mathrm{m}^{2}$ of space with 72.61MHz an operation speed and $0.266 \mu \mathrm{W}$ power utilisation. The proposed 41-tap FIR filter design introduces significant improvement in performance and power consumption compared to existing work. The proposed design operates 3.6x faster and reduces power consumption per tap by 99.9998% compared to the existing design.