CIM-MAP: A Constraint Programming Based Orchestrator for Multi-Array Computing-in-Memory Architectures

To address the “memory wall” bottleneck in von Neumann architectures for deep learning acceleration, this study proposes a dynamic ID allocation and constraint programming-based orchestration framework for Computing-in-Memory (CIM) multi-array architectures. Our methodology employs model parsing to decompose computational layers into mainline/parallel branches, enabling segmented pipelined execution that increases CIM array utilization by over 30%. By integrating weight size-driven array allocation with operator replication technology, we reduce data dependency latency by 36.76% on ResNet50 and 39.01 % on YOLOv4-Tiny compared to conventional approaches. The dynamic resource allocation mechanism achieves energy efficiency optimization through balanced task mapping across CIM arrays, validated by hardware experiments. The proposed architecture-level innovations advance CIM technology's scalability and adaptability, particularly for edge AI applications requiring low-power processing.