Design and Simulation of a 3 port Bidirectional Router with Suspend-Based Flow Control

This paper presents a bidirectional router with integrated data forwarding designed for multi port communication in digital systems. The router processes 8-bit data packets and employs a finite-state machine (FSM) with four states: IDLE, HEADER, PAYLOAD, and PARITY, ensuring structured packet handling. The system operates at 500 MHz, achieving an average latency of 3 clock cycles per packet under normal traffic conditions. The router supports dynamic data forwarding using a 2-bit destination address, allowing flexible routing between three bidirectional ports. Each port implements tri-state logic, preventing bus contention while enabling efficient data transfer. Prior work may incorporate bidirectional links, our design uniquely combines tri-state logic with suspend-based flow control and FSM-driven packet handling. The integration of error detection and dynamic forwarding across ports without additional buffers or multiplexers reduces complexity and supports simultaneous bi-directional communication.The system includes an error detection mechanism that identifies invalid addresses and parity mismatches. Additionally, a suspend-based flow control prevents data loss due to concurrent packet requests, improving system stability when compared to static allocation-based designs. Suspend-based flow control is simpler and area-efficient compared to credit-based or token-based mechanisms. Credit-based systems offer finer control over buffer usage, they require additional logic and memory to track credits. Suspend-based flow control reacts quickly to which is well-suited for routers where latency ,power and area are critical. Simulation results demonstrate a peak throughput of 1.2 Gbps per port, making this design suitable for high-speed, low-latency communication in digital interconnect systems.