Approximate Adder for Image Processing with Enhanced Energy Efficiency

Approximate computing offers a revolutionary strategy to address the increasing needs of compute-heavy tasks like media processing and recognition, which can accommodate a certain level of error within acceptable boundaries. In these scenarios, addition requires a significant amount of power. Therefore, optimizing the adder can result in considerable reductions in area, power consumption, and delay. This paper presents a technique that approximates the moderate significant region of the adder, with enhanced accuracy achieved. Additional hardware complexity is minimized by incorporating a constant correction term in the least significant region, which enhances area and power efficiency while maintaining only slight accuracy loss. Results validate the effectiveness of the proposed design, demonstrating up to a 66.7% improvement in power compared to existing designs.