A 2–2.65-GHz Dual-Core VCO With High- Linearity Varactor Array and High-Q Switched Capacitor Bank Achieving −128 dBc/Hz Phase Noise at 1 MHz Offset

A dual-core LC voltage-controlled oscillator (VCO) implemented in a 28-nm CMOS process, targeting low phase noise and wide tuning range with improved linearity. To enhance phase noise performance while minimizing area overhead, a direct-coupled dual-core architecture is adopted, effectively halving the inductance while preserving high-Q characteristics. A dual-gain segmented varactor array is introduced, with a 1:9 sizing ratio to reduce tuning gain and improve linearity. In addition, a low-leakage, high-Q switched-capacitor array is proposed to effectively suppress off-state parasitic capacitance. Owing to its ultralow leakage current, the array enables wider tuning range without degrading the quality factor. The proposed VCO achieves a measured tuning range from 2.0 to 2.65 GHz across 16 bands with more than 65% overlap. The tuning sensitivity is 95 MHz/V with high-linear response from 0.2 to 1.0 V. The phase noise is −128 dBc/Hz at 1 MHz offset. The proposed VCO is suitable for high-performance, low-noise RF applications.