Research on Surge Current and Avalanche Voltage Reliability Testing of 1200V SiC MOSFETs

This study systematically investigates the reliability degradation mechanisms of 1200 V planar-gate SiC MOSFETs under single-pulse surge current stress and single-pulse avalanche stress. By developing dedicated surge and avalanche testing platforms, critical electrical parameters including threshold voltage, on-resistance, output characteristics, and transfer characteristics were evaluated. Combined with three-terminal resistance measurements and decapsulation-based morphological analysis of failed devices, failure modes under extreme stress conditions were elucidated. Experimental results demonstrate that the device exhibits no degradation under single-pulse surge currents up to 400 A. However, after 600 repetitive surge cycles, the drain leakage current abruptly increases to the failure threshold (100 mA), corresponding to localized burn marks in the source region. Avalanche testing further reveals that devices are more susceptible to gate oxide breakdown due to electric field concentration. This research provides experimental evidence and theoretical foundations for reliability-oriented design of SiC MOSFETs in high-stress applications.