Gate oxide reliability of planar-gate SiC MOSFET under repetitive avalanche stress

One of the most severe conditions encountered in silicon carbide MOSFET applications is avalanches, which have an inconclusive impact on the reliability and longevity of the device. Avalanches recur most commonly in applications. This study focuses on evaluating the reliability characteristics of gate oxide layers in silicon carbide (SiC) MOSFETs subjected to repeated avalanche stress. The gate leakage current exhibits a sudden increase to the magnitude of milliamps during repeating avalanche conditions. The finite element simulation reveals that the maximum impact ionization rate and the highest electric field strength are distributed in the center of the JFET region. The Rg-Vg comparison test demonstrates that the device degradation mechanism is the injection and accumulation of hot holes in the JFET region, which result in the formation of a conducting path. Lastly, the potential of employing the gate leakage current as a gate oxygen state monitoring device is investigated.