Research on the Failure Mechanism of TSV Interconnection Structure in RF Microsystem under Temperature Stress

In order to analyze the failure mechanisms of electrical transmission characteristics and stress distribution in Through Silicon Via (TSV) interconnection structures, this paper conducted thermal shock (-55° to 150 °) and high-temperature storage (200 ° /300 ° /400 ° ) tests. A finite element model of TSV structure was also established. The electrical characteristics (S21), microstructure, and stress-strain behavior of the TSV were investigated. The failure mechanisms of TSV structure under thermal shock and high-temperature storage conditions were elucidated. By combining microstructural observations, the degradation process of TSV induced by temperature stress was studied. The results indicate that the transmission performance of the TSV structure significantly deteriorated after 50 cycles thermal shock. After 1000 cycles, the maximum attenuation of S21 reached 0.55dB. Microscopic analysis revealed that the insulation layer of the TSV cracked due to thermal shock, leading to reduced insulation between the silicon substrate and copper, as well as signal current leakage into the silicon. Under high-temperature storage, the electrical transmission characteristics of TSV structures exhibited significant differences. By integrating experimental data with simulations, this paper systematically investigates the failure mechanisms of TSV structures under temperature stress, providing valuable references for the reliability evaluation of TSV.