Optimizing Through-Silicon Via (TSV) Filling: Effects of Copper Ion Concentration and Additive Molecular Weight in Stepwise Direct Current Electrodeposition

3D packaging has emerged as a promising solution due to its advantages in integration density, lightweighting, compactness and cost-effectiveness. Through silicon vias (TSV) technology plays a crucial role in 3D integration by enabling vertical electrical interconnections between stacked chips. However, the reliability of TSV structures depends heavily on the quality of the copper filling. Conventional plating additives often fail to ensure hole-free and uniform filling, and the development of novel additives remains a pressing challenge. This study systematically investigates the role of the non-traditional additive in improving the copper plating process within TSVs. TSVs of 100 μm:10 μm were plated at different copper ion concentrations and different molecular weights of additive. The final filler quality was evaluated using optical microscopy and Focused Ion beam microscopy (FIB) analysis. The inhibition mechanism of additive was explored by electrochemical measurements. The results showed that the combination of higher copper ion concentration and low molecular weight additive significantly improved the filling performance and promoted more uniform copper deposition. The additive acted as an effective inhibitor during the deposition process, reducing the formation of voids and improving the reliability of the TSV. This study reveals the inhibitory role of additive in TSV plating and provides valuable insights for optimizing the TSV filling process.