Use of E-beam Lithography to Optimize Lithography Patterning on SiC Wafers

Silicon carbide (SiC) is a wide bandgap semiconductor material used to manufacture high-voltage and high-temperature operating devices. As SiC technology continues to advance, the density of devices across a wafer increases as transistors become smaller. On commonly used 6-inch SiC wafers, the wafers are subject to wafer bowing due to the physical hardness of the material. Optical-based lithography faces several critical challenges when applied to the fabrication of SiC and other wide bandgap semiconductors, particularly in advanced device architectures like FinFETs and T-gate structures. A major limitation is the shallow depth of focus inherent in optical lithography systems. Because SiC devices often involve non-planar topographies—due to deep etching, thick epitaxial layers, or trench structures—the limited depth of focus can lead to pattern defocusing and critical dimension (CD) variation across uneven surfaces. This is especially problematic when trying to define narrow fins or ultra-short gate lengths, where nanometer-level precision is essential for device performance and yield. Further, implementing conventional photolithography can lead to resolution inconsistencies across the wafer and significantly reduce yield. Cross-wafer yield is a challenge that can be addressed with e-beam lithography (EBL). E-beam direct-write lithography demonstrates superior fidelity of nanoscale features due to its great depth of focus over challenging topography on 6-inch and greater diameter SiC wafers. All the while, the specific multicolumn e-beam lithography (MEBL) system implemented herein overcomes throughput challenges historically hampering EBL, making it a production-worthy lithography system for compound semiconductors.