Analysis of Group III-V Material-Based Symmetric High-k Spacer on S/D Underlap Junctionless Nanotube FET Considering for Cutting Edge Technology

The usage of III-V group semiconductors has increased drastically in the last few years, owing to their superior characteristics that can be tailored by adjusting the composition and structure of the materials. In this paper, a junctionless GAA (gate all around) nanotube FET has been studied with a high-k spacer on the S/D (Source/Drain) underlap region. The paper examines the device performance by incorporating the group III-V semiconductors as a channel material, such as GaAs (Gallium Arsenide), GaN (Gallium Nitride), and alloys such as InGaAs and SiGe. For this, a comprehensive analysis has been done with the aim of finding the efficacy of these materials for a wide range of applications, mainly in terms of analog, static, and RF (Radio Frequency) linearity metrics. The results obtained are simultaneously compared with the silicon material. It is observed that each channel material has its own characteristics when amalgamated onto a junctionless Nanotube FET. It has been found that with GaN channel material, the device exhibits superior performance in terms of high current driving capability ( $\sim 1.6\mu $ A), improved transconductance, and higher derivative, making it suitable for linear amplifiers. Further, the InGaAs channel material device shows a low threshold voltage (below 0.1V), making it suitable for low-power applications. The GaAs achieves very low SS (18mV/decade), and thereby possesses a high switching ratio. Thus, the proposed analysis provides an in-depth insight into choosing channel material wisely based on the required applications.