Analysis of Bias Temperature Instability in Peripheral CMOS Devices for Low-Temperature Memory Applications

In this study, the bias temperature instability (BTI) of peripheral complementary metal–oxide semiconductor devices in a cell-on-peri (COP) structure is investigated under cryogenic conditions. First, positive BTI (PBTI) in the nMOSFET is found to be more severe than negative BTI (NBTI) in the pMOSFET, despite the same overdrive voltage. This behavior is primarily attributed to the shorter carrier capture/emission time of the nMOSFET. Second, the threshold voltage shift ( $\Delta V_{\mathrm {th}}$ ) in the pMOSFET caused by NBTI increases as the temperature decreases from 300K to 77K. This trend differs from that of the nMOSFET and is reported here for the first time. It is attributed to increased Fowler–Nordheim (FN) tunneling and impact ionization, resulting from suppressed phonon scattering at low temperatures. Last of all, the nMOSFET exhibits hump characteristics due to PBTI.