Synthesis of Critical Patterns for Lithography Optimizations through Machine Learning

Critical patterns are layout patterns that cannot be corrected by standard MB-OPC with enough accuracy. Since they are infrequent, lithography applications targeting critical patterns such as inverse lithography technology (ILT) can suffer from insufficient samples. We propose a method to synthesize critical patterns and their mask patterns. (1) A multilayer perceptron (MLP) model is constructed to predict the probability that the feature vector of a mask pattern, obtained through a mask encoder, is critical. A key is to perform gradient ascent through the MLP network, which has been trained before, to identify some new critical feature vectors. (2) Such vectors are decoded, using a mask decoder, into an image which is refined using a conditional generative adversarial network (cGAN) for final critical mask patterns. (3) A U-Net model is applied to critical mask patterns to discover the critical layout patterns. Experiments are performed for quick ILT through U-Net model. When the synthesized critical mask-and layout-patterns are used to train the U-Net, ILT becomes more accurate and the standard deviation of EPE distribution for ILT outputs is reduced by 36.3%. Lithography modeling is considered for another application of the proposed method. The RMSE of lithography model is reduced by 30.7% when the model is calibrated with synthesized critical layout patterns, compared to base model built with standard test patterns.