Energy-Efficient Hybrid Approximate Posit Multiplier Architecture for Neural Network Based Underwater Image Enhancement Application

This paper presents a novel Hybrid Approximate Posit Multiplier (HAPM) architecture for energy-efficient neural network acceleration in image enhancement applications. Traditional Posit multipliers with varying configurations and the IEEE 754 32-bit multiplier were implemented and compared as a baseline. The HAPM was synthesized in Verilog and run with Xilinx Vivado to evaluate hardware resource metrics such as LUTs, flip-flops, IO, and DSP. It was further integrated into a Feedforward Neural Network (FFNN) for super-resolution in grayscale underwater images. The network was first implemented in Python for software modelling, followed by conversion to C++ using Vitis HLS for hardware implementation. HAPM reduces hardware complexity by combining approximate logarithmic methods with optimized lookup tables, enabling lightweight and fast computation. Compared to existing multipliers, it achieves up to 28.1 % reduction in LUTs, 18.4 % fewer flip-flops, and 35 % lower DSP utilization. ASIC synthesis using Cadence Genus also demonstrates area savings of up to 24.6 % and power reduction by 22.9 %, while maintaining near-identical output quality with less than 3% drop in PSNR (peak signal to noise ratio) and SSIM (structural similarity index measure) error resolution application. These improvements validate HAPM as a promising solution for real-time, edge-AI, and resource-constrained VLSI systems.