A Novel Framework against Reverse Engineering and Cloning in Untrusted Multi-tenant Cloud FPGA.

The integration of Field-Programmable Gate Arrays (FPGAs) in cloud architectures meets the demand for enhanced performance and scalability. FPGAs offer dynamic reconfiguration, enabling tailored hardware acceleration while minimizing power consumption. Major cloud providers like Amazon, Huawei, Microsoft, and Alibaba are incorporating FPGA-based cloud acceleration services. However, this integration introduces security challenges. In cloud FPGA deployment, cloud FPGA providers (CFPs) conduct extensive Design Rule Checks (DRC) to identify malicious circuits based on oscillation. These malicious circuits have been accused of launching remote power sidechannel, denial of service (DoS), and remote fault injection attacks. The attackers exploit the Power Distribution Network (PDN) of the FPGA boards, causing excessive voltage drops that can compromise the security and integrity of the designs on the board and attacks are often successful due to the shared nature of the PDN network. However, providing untrusted cloud FPGA providers with access to tenant design bitstreams also raises concerns about data confidentiality and integrity. Similar to attackers, having access to a tenant’s design can lead to intellectual property theft, cloning, and reverse engineering. Furthermore, current Trusted Execution Environment (TEE)based isolation techniques cannot guarantee prevention against these attacks, as they do not consider the CFP as a malicious entity. Additionally, many of the proposed methods come with significant implementation overhead. In this context, we propose an optimized obfuscation-based security model that provides protection against reverse engineering, cloning, and piracy. Importantly, our solution imposes minimal overhead, outperforming other suggested approaches in terms of efficiency and, in some cases, even reducing overall operational overhead.