Late Breaking Results: Automated Topology Generation for Power Amplifier Designs through BiLSTM-based DNN and Multi-objective Optimizations

This work presents an automated, intelligent methodology for optimizing power amplifier (PA) design by predicting the most suitable circuit topology-specifically, the input and output matching networks-for a given high electron mobility transistor (HEMT). A classification-based bidirectional long short-term memory (BiLSTM) deep neural network (DNN) is trained to determine the optimal PA topology, while multi-objective Pareto front-based optimization techniques refine the network’s hyperparameters, including the number of hidden layers and neurons. The proposed approach is adaptable to various HEMT models and is validated through the design and optimization of high-performance PAs using lumped elements and transmission lines, operating within the $1-2 \mathrm{GHz}$ frequency range. The method is demonstrated using the Cree CGH40010 GaN HEMT on a Rogers RO4350B substrate, achieving a power output of approximately 40 dBm, a power-added efficiency (PAE) of at least 50%, and a power gain exceeding 10dB.