Efficient modulo 2n–4 arithmetic units

This work presents novel and efficient architectures for modulo $2^{n}-4$ adders, modulo $2^{n}-4$ multipliers, and modulo $2^{n}-4$ residue generators that exploit the intrinsic characteristics of modulo $2^{n}-4$ arithmetic. The proposed designs are derived from existing architectures for modulo $2^{n-2}-1$ operations, supplemented with simple logic components, thereby enabling highly efficient VLSI implementations. Experimental comparisons validate that the proposed circuits offer substantial improvements in delay and area over previously reported designs.