A Novel Firmware Architecture leveraging Race to Sleep paradigm for Ultra-Low-Power CPS

This paper proposes a novel firmware architecture and methodology able to drastically reduce power consumption while offering Quality of Service (QoS) capabilities to cyber-physical systems (CPS). By leveraging low-cost Commercial Off-The-Shelf (COTS) embedded platforms such as the ESP32, this work demonstrates a hybrid approach combining ultra-low-power (ULP) coprocessing with event-driven computation. Consequently, the presented techniques effectively address challenges raised by resource-constrained embedded systems utilized in complex CPS scenarios posing tight performance, reliability targets and limited energy resources. The proposed design is validated with a prototype implementation that includes real-time sensing, wake-up interrupts, and on-demand heavy computations, all orchestrated under minimal power draw. Results indicate a substantial reduction in power consumption, improved battery life, and consistently high QoS.