Resource-Efficient LSTM Architecture for Keyword Spotting with CORDIC-Activation Approximation

This work presents a resource-efficient Long ShortTerm Memory (LSTM) accelerator for keyword spotting applications, leveraging CORDIC-based approximation for nonlinear activation functions. The proposed design optimizes hardware utilization by replacing traditional activation functions with CORDIC-based tanh, reducing computational overhead while maintaining precision. A lightweight LSTM architecture with minimal memory usage and optimized processing elements (PEs) is implemented, integrating quantization techniques to reduce storage requirements without degrading performance. The model is re-implemented in C++ with HLS pragmas to enhance parallelism and synthesis efficiency. The proposed accelerator is deployed on the ZCU104 embedded-FPGA platform, leveraging a hardware/software co-design approach to balance computational efficiency and flexibility. Experimental results show that the optimized design reduces DSP utilization by $1.7 \times$, improves computational efficiency from 12.87 to $14.83 \mathrm{GOPs} / \mathrm{W}$, and lowers energy per inference by 13.2%, achieving a $1.13 \times$ speedup in latency (14.91 ms vs. 16.88 ms) compared to the baseline. These enhancements demonstrate the suitability of the proposed approach for real-time, resource-constrained keyword spotting. Codes and subsequent files are available at GitHub Repository.