Accelerating Equation Solvers using Gauss-Jacobi on Multi-FPGA Systems with Ring NoC

This paper presents a novel approach for performing iterative computations distributed across a network of FPGAs. For example, approximate computing of the Gauss-Jacobi iterative method is used to solve a large-scale linear system. Another example is accelerating the simulation of a digital logic circuit by partitioning it at the flipflop boundaries and distributing the simulation workload across the network of FPGAs. A sample architecture outlined and studied in this work consists of four FPGAs interconnected via a Ring Network-on-Chip (NoC), facilitating efficient communication. As is typical, the FPGAs will have resource constraints, necessitating a suitable scheduling and binding to use the limited resources cleverly. The system is designed to efficiently schedule operations across FPGAs using a computation graph, where multiplications and additions are performed in sequential cycles. Using simulated annealing for effective workload distribution, we explore partitioning strategies, scheduling, and data movement. Additionally, this framework can be leveraged to accelerate machine learning algorithms that rely on iterative matrix operations, such as gradient descent and neural network training. Our results demonstrate the feasibility of high-performance iterative solvers on FPGA clusters with minimal communication overhead.