Tunable Approximate Booth Multiplier

A novel method for generating tunable approximate multipliers based on the original, radix-2, Booth multiplication algorithm is proposed. A configurable number of partial products are generated and added in descending significance order. The degree of approximation is tunable by selecting the number of partial products used and an exact result can be calculated if required. We present and evaluate a run-time tunable implementation, which generates and accumulates one partial product per cycle. We also briefly outline a method for producing design-time tunable multipliers of the same method. The implementation is open sourced in parameterizable Verilog which can be synthesized into signed multipliers of arbitrary bit width for each of the multiplier and multiplicand inputs. We evaluate the design for 8, 16, 32-bit widths, presenting accuracy, area, delay and power metrics for all sizes, and report its performance in simple error-tolerant image processing applications. This method produces much better Mean Average Relative Error (MARE) results than most state-of-the-art approximate multipliers, while producing excellent results in just 2 cycles for the image processing applications.