Computationally Efficient Enhanced CB-DPWM for Vienna Rectifier with Low-Order Harmonics Mitigation Considering DC-link NP Voltage Impact

For dual-output load applications, conventional discontinuous pulse width modulation (DPWM) can introduce terminal voltage errors due to oscillated and unbalanced DC-link neutral-point (NP) voltages, which in turn increase low-order current harmonics. In addition, modified DPWM schemes using asymmetrical space vector diagrams are computationally intensive. To achieve low computational complexity and low-order harmonics mitigation, this paper proposes a computationally efficient enhanced carrier-based DPWM (ECB-DPWM) scheme for Vienna rectifiers considering DC-link NP voltage impact. To reduce switching loss, the clamping modes considering DC-link NP voltage are analyzed detailed. The zero-sequence components (ZSCs) and modulation signals of ECB-DPWM is derived to minimize switching losses while addressing NP voltage. Experimental results verify that ECB-DPWM significantly reduces low-order current harmonics both under balanced and unbalanced DC loads, while lowering switching losses by over 36% compared to optimized space-vector pulse-width modulation (OSVPWM) and reducing runtime by 49% compared to asymmetrical DPWM method.