1500 V GaN-on-Si Vertical Power MOSFETs: From Quasi-Vertical to Fully-Vertical Topology

In this paper, we demonstrate 1500 V fully-vertical GaN-on-Si trench MOSFETs (FV-MOS) with conductive buffer and fluorine implanted termination (FIT). Thanks to the conductive buffer layers, the low-resistance Si substrates intrinsically serve as the drain electrodes, eliminating the commonly adopted n⁺-GaN drain contact layer and relieving sufficient strain space for the growth of a $\boldsymbol{7 \mu \mathrm{m}}$ thick n--GaN drift layer on Si substrates. The originally conductive n⁺-GaN/p-GaN layers are converted into highly-resistive regions with implanted fluorine ions, which effectively isolates the discrete FV-MOS devices and efficiently mitigates the electric field crowding effect at the corner of the traditional mesa etching termination (MET). The fabricated FIT-FV-MOS exhibits state-of-the-art breakdown voltage (BV) of 1495 V, together with a threshold voltage ($V_{TH}$) of 4.2 V, a specific ON-resistance ($R_{ON,SP}$) of 9.7 mΩ.cm², and an on/off ratio of ~10⁷. These results indicate great potential of cost-effective GaN-on-Si vertical transistors for next-generation power systems.