An MLIR-Based Compiler for Hardware Acceleration with Recursion Support: (PhD Forum Paper)

Generating custom hardware accelerators within a high-level programming framework is a complex task. However, compiling and generating accelerators for kernel programs that use recursion is often unsupported, necessitating manual refactoring to ensure compatibility with high-level synthesis (HLS) tools. The single-level abstraction in existing HLS frameworks limits recursive application transformations, hindering efficient acceleration. In this paper, we present an automated restructuring technique for recursive applications, built on multi-level intermediate representation (MLIR), aimed at generating high-quality hardware accelerators through HLS. We automatically detect recursive calls and analyze recursive data structures to generate loops, state machines, and stacks for simulating recursion, thus enabling an end-to-end compilation process. Experimental results show that, compared to a domain-specific language (DSL) compiler supporting recursion, our approach outperforms methods requiring manual modification of recursion into DSL representations in over 55% of the benchmark cases, achieving an average resource reduction of 51.3 %. Furthermore, compared to HeteroRefactor, we support more benchmarks and provide a synthesizable architecture.