Analysis of Circuit Non-Idealities in Asynchronous Delta Sigma Modulator

Asynchronous Delta Sigma Modulator (ADSM) is a continuous time digital ADC which performs duty cycle modulation and encodes the signal in time domain. Thanks to its in-band spectral purity, the output spectrum contains low frequency input signal along with out of band high frequency modulation components making them suitable for high resolution applications (14b-16b). However, similar to any other practical circuit implementation, the non idealities of circuit elements degrade the performance. This paper explores and analyses the effects of various circuit artifacts and proposes circuit solutions in order to improve the performance. The finite UGB of the transconductor is addressed with the assisted DAC technique. A compensation scheme is proposed to address the propagation delay of the schmitt trigger. It also investigates the effect of metastability of the schmitt trigger.