High-Speed Energy-Efficient True Random Number Generator Using Self-Compensating Comparator

This paper proposes a self-compensating comparator topology based on the StrongARM latch to generate high-speed and low-power random bits. The self-compensation mechanism cancels the offset voltage resulting from transistor mismatch. Using our self-compensating comparator, we design a TRNG (True Random Number Generator) with a simple XOR-based post-processing. Post-layout simulation results targeting TSMC 65 nm low-power process confirm the operating principle of the proposed self-compensation and high-speed operation. The TRNG can generate random bits at 1 Gbps while consuming only $82 \mu \mathrm{W}$ of power.