Low-Cost Spiking Networks on FPGA for Event-Based Gesture Detection

This work presents an FPGA implementation of a Spiking Neural Network (SNN) for gesture classification using the DVS128 dataset. The primary contribution is an SNN design that prioritizes ultra-low resource usage (3.41 % LUTs, 0.126 W) while maintaining moderate top-1 accuracy (62.85 %), high top- 3 accuracy (91.67 %) and high throughput (11400 FPS). The implementation is synthesized and implemented on a Zynq UltraScale+ ZCU104 FPGA development board. The proposed hardware model achieves ultra-low resource utilization and demonstrates a viable balance for resource-constrained applications.