Investigation on Electrostatic Discharge and Surge Robustness of Silicon Carbide High-Voltage Devices

This work presents a comprehensive study on the electrostatic discharge (ESD) and surge robustness of 4H-SiC vertical double-implanted MOSFETs (VDMOSFETs). The ESD analysis includes human-body-model (HBM) and transmission-line-pulse (TLP) testing across various stress modes, complemented by transient waveform measurements and TCAD simulations. The surge analysis also introduces the transient analysis and TCAD simulation. Both single and repetitive surge stress surge tests are conducted to evaluate electrical degradation behavior. In both HBM ESD and surge tests, GS and –DG modes are vulnerable to gate oxide breakdown. Physical failure analysis techniques, including Optical Beam Induced Resistance Change (OBIRCH), Scanning Electron Microscopy (SEM), and Focused Ion Beam (FIB) techniques, are used to identify damage locations and failure mechanisms of the failure samples.