Full-Well Capacity Model of CCD Pixel on CMOS Technology From the Perspective of Electric Field Strength

Unlike the traditional charge-coupled device (CCD), which can easily guarantee a sufficient full-well capacity (FWC), the FWC of CCD on CMOS technology (CCD-on-CMOS) is greatly reduced. As a result, it is essential to build an accurate model to provide guidance for the design of CCD-on-CMOS. However, on the one hand, reports about the FWC model of CCD-on-CMOS are rare to see. On the other hand, the modeling idea of FWC in CMOS image sensor (CIS) is not suitable for CCD-on-CMOS due to the different potential distribution of the depletion region. In this article, we propose an FWC model based on the electric field strength difference between the barrier pixel and the full pixel. By building the function of electric field strength of the barrier pixel, calculating boundaries of charge packet, and defining two kinds of full-well modes, the FWC of both modes can be solved. The model is verified to have over 95% agreement with technology computer-aided design (TCAD) simulations. In addition, we construct the FWC expression based on the charge packet center to explain the experimental results from the theoretical level.