An Automated Method for Eliminating Oscillation in Combinational Logic Circuit

Combinational logic loops are relatively common in digital circuit design but are generally not desired. Unintentionally introduced loops may lead to issues such as multiple driving, signal oscillation, and increased circuit power consumption. To address this problem, this paper improves the loop search algorithm, significantly enhancing the detection efficiency of complex loops. We propose a Boolean differential-based logical derivation framework capable of automatically analyzing the triggering conditions for loop oscillation. Additionally, we introduce the CCCT (Combinational Circuit Cut-off Technique) loop-breaking method, which effectively eliminates potential risks of oscillatory behavior in feedback loops while maintaining the intended logical functionality of the system. In experiments, our method processed complex netlists composed of over 1.2 million logic gates, achieving a loop detection and oscillation analysis accuracy rate of 99.7%.Furthermore, at the EDA Elite Challenge 2024, our solution got the top technical score among 105 participating teams for problem 5.