Technology-Independent Local Mismatch Estimation Using Precomputed Lookup Tables

This paper revisits the precomputed lookup table (LUT) design methodology to accommodate an estimation technique for local mismatch. The presented methodology restores the design intuition regarding mismatch in the early design phases without relying on lengthy Monte Carlo mismatch simulations or the need for technology-dependent mismatch fitting parameters. The estimation method employs the Pelgrom mismatch model and precomputed gm/ID LUTs to systematically model random threshold voltage variations across all dc biasing conditions for MOSFETs. The methodology offers significantly faster predictions for mean and standard deviation errors within 1% of those obtained from SPICE Monte Carlo simulations. Different current mirror designs are demonstrated by leveraging the proposed methodology in a 22nm FDSOI technology.