A Linear High-Speed 1xVDD LVDS with PVT Compensation Using 45nm CMOS Technology

Process variations and reflection mismatching creates hurdle for the data transferred speed over the channel. A high-speed, low voltage differential signaling (LVDS) can be used with a process, voltage and temperature (PVT) compensator to pay off these losses. In this endeavour, polysilicon resistor, in series with MOS switch, has been adopted for better linear LVDS. The approach resulted in reduced reflection coefficient due to the mismatching of impedance at different cell corners. Implementation of PVT compensation achieved through NMOS and PMOS process detector that reduced the reflection coefficient by 57.2% to 100% from worst case FF corner to SS corner respectively. An appreciable data rate of 10000 Mb/s with 1 V supply and 400 fF load authenticated the compatibility at 45 nm CMOS technology.