3D On-chip Network Structure and Routing Algorithm for Large-scale Neuromorphic System

The development of artificial intelligence enables instruments to cope with more complex and diverse measurement tasks. Inspired by the human brain, large-scale neuromorphic systems can optimize the architecture of measurement systems in terms of data processing capabilities and methods. They are typically composed of multiple chips, and on-chip network technology is crucial for supporting high-performance parallel and distributed computing. Inspired by the morphological structure of cortical microcircuits, this study proposes a three-dimensional on-chip network structure with multi-level clustered mesh and routing algorithm that is specifically designed for Field-Programmable Gate Arrays (FPGAs). The proposed approach is validated on a neural morphological system consisting of 40 FPGAs. Compared to traditional on-chip network structures, the proposed structure exhibits higher saturation injection rates and lower resource consumption, which reduces communication latency and improves scalability. This advancement facilitates the coordinated operation of large-scale Spiking Neural Network (SNN) systems and multi-brain area microcircuits, paving the way for future optimization of measurement and data processing in instruments and devices from the perspective of large-scale brain-inspired computing.