A 26.5–29.5 GHz Doherty Phased-Array Transceiver Front-End With 7-Bit Phase Shifter and 16% Back-Off Drain Efficiency

This brief presents a 26.5–29.5 GHz dual-polarized 8-element Doherty phased-array transceiver front-end (TRX FE) for 5G applications. A 7-bit all-pass network (APN) phase shifter with <0.63° RMS phase error is applied for precise beam steering. Mismatch analysis and Monte Carlo simulations are conducted to verify the phase accuracy and robustness of the proposed high-resolution phase shifter. A compact transformer-based matching network is employed to enhance power efficiency in transmitter (TX) mode and ensure good input matching in receiving (RX) mode. Fabricated in 65-nm CMOS and integrated with a flip-chip package, the proposed TRX FE achieves an OP1dB of 17.1 dBm with 16.0% drain efficiency (DE) at 6-dB power back-off, and a minimum noise figure (NF) of 5.4 dB. The chip occupies an area of $6.15\times 4.06~\text {mm}^{2}$ and consumes 350/74 mW in TX/RX mode, respectively, offering a power-efficient and high-resolution phase-shifting solution for large-scale phased-array systems on bulk CMOS platforms.