Voltage Reduction (1.4V) and Array Scaling (41nm) of Ferroelectric NVDRAM for Low-Power and High-Density Applications

We present a second generation of scaled Ferroelectric NVDRAM [1] with a reduced x- and y-direction pitch (41nm), a thinner ferroelectric stack (5nm) and a lower array operating voltage (Read/Write at 1.4V). We present full chip array data, showing a >250mV window at −4σ after 1E10 cycles. This is the densest 1T1C ferroelectric technology with such high performance. Multiple material and electrical challenges were addressed to ensure performance was maintained at reduced dimensions.