Evaluation of Rapid Vt Testing of Wafer-Level MOSFETs

We evaluate applicability of a spot Ids method of rapid Vt test to wafer-level CMOS transistor testing. We discuss reference data requirements vs Vds bias, body bias, and W/L sizes with respect to Vt error. We compare Rapid Vt to full Vgs sweep Vt values on CMOS wafer NMOS and PMOS transistors and demonstrate comparable channel doping results.