Hysteresis-Induced Neuromorphic Behavior in 180nm Bulk PMOS Devices at 3K

There is a growing demand for energy efficient and high-performance computing devices to implement complex and powerful machine learning algorithms for artificial intelligence (AI). One possible solution to achieve the desired high performance by leveraging the mature and standard CMOS technology with the emerging neuromorphic computing operating at cryogenic temperatures. This work investigates the neuromorphic behavior of TSMC 180nm bulk PMOS devices at 3K, focusing on hysteresis and synaptic characteristics. Gated pulsed measurements reveal potentiation and depression behavior, with conductance changes due to pulse amplitude and width variations. These findings contribute to the early-stage development of cryogenic neuromorphic computing systems.