Developing a Spacecraft Digital Twin to Parallelize Flight Software and Hardware Development

There is a growing need to make software and hardware development efforts run in parallel to reduce cost and time. Creating a digital twin of a spacecraft's peripheral interfaces allows for earlier flight software testing, without a need for physical hardware. This paper explores the creation of a digital twin for the Cyclone Global Navigation Satellite System (CYGNSS) spacecraft using Renode and Verilator toolsets. In addition to the cost and time saving benefits, a digital twin also enables initial hardware/software integration testing. Bugs that may normally be found at the beginning of hardware integration can be squashed earlier before the mission hardware asset is available. Additionally, common issues in software such as clocking domains, reset architecture, and sequencing issues that can cause damage to the hardware can be discovered without risk. Several obstacles prohibited fast development of the virtualized hardware. One of which was, working with a model of a system as complex as CYGNSS led to issues related to timing. Running simulations took anywhere from 1/10th real time speed to 1/1000th. However, simulation time was greatly reduced to near real-time by incorporating stub-like modules to mimic Field Programmable Array (FPGA) functionality. The resulting approach found would be useful in improving flight software fidelity during development of the system, but would not be ideal for simulation of existing, complex systems.