FPGA-Based Rapid Compensation of Carrier Phase Delay and Modulation Depth in PGC Demodulation

The phase-generated carrier (PGC) demodulation has emerged as a predominant demodulation method for fiber-optic interferometric sensors (FOISs). In practice, dynamic optical path delays and environmental optical path difference (OPD) variations induce drift in PGC demodulation’s key parameters: carrier phase delay ( $\theta $ ) and modulation depth (C), degrading accuracy. This article presents a novel FPGA-based PGC algorithm incorporating quadrature multifrequency mixing (MFM) technology, which addresses these limitations through two key innovations: an elimination of phase delay (EPD) module implementing a novel sign-bit generation mechanism that enables complete 0°–360° phase compensation while eliminating $2\pi $ -magnitude phase jumps and compensation of modulation depth (CMD) module that dynamically computes the ${J}_{{2}}\text {(}{C}\text {)}/{J}_{{1}}\text {(}{C}\text {)}$ Bessel ratio to actively suppress harmonic distortions. Numerical simulations verify the algorithm’s high-speed suppression of distortions under varying $\theta $ ( ${0}\pi $ – $2\pi $ ) and C (1.0–3.5 rad) conditions. Experimental results demonstrate significant performance enhancements, including a 32.9-dB signal-to-noise-and-distortion (SINAD) ratio, a 21.5-dB improvement over conventional methods, and total harmonic distortion (THD) of 1.81% (17.6-dB enhancement). The design achieves 98.6% frequency-domain linearity. Leveraging the parallel processing capability of the field-programmable gate array (FPGA), this solution achieves real-time compensation at a throughput of one sample point per clock cycle, making it particularly suitable for large-scale FOIS deployments, including underwater acoustic monitoring and other precision sensing applications.