High [dV/dt] Accelerated Hot Carrier-Induced Degradation in Power LDMOS Devices Under Repetitive Switching Stress

The drain-side slew rate [dV/dt] enhanced hot carrier injection (HCI) of the n-type lateral double-diffused MOSFET (n-LDMOS) under dynamic drain stress conditions is experimentally investigated. The fast measurement system, utilizing pulse I–V technology, is designed to generate tunable [dV/dt] rates for the device. The degradation characteristics caused by hot electron and hot hole injection are decoupled via pulsewidth modulation (PWM) techniques. The measured ${V} _{\text {TH}}$ shift results cooperated with TCAD simulations have demonstrated that negative [dV/dt] will exacerbates HCI induced degradation in LDMOS, while positive [dV/dt] exhibits no significant correlation with HCI degradation. This polarity-dependent degradation behavior fundamentally redefines reliability-aware design rules for slew rate optimized gate drivers in high-frequency power management systems.