Investigating Compact Shadow Stacks for the Xtensa LX Architecture

This paper presents a compact shadow stack implementation for the Xtensa LX architecture, implemented for an ESP32 microcontroller. The implementation is done by changing the register window exception handlers in the FreeRTOS operating system. In a second implementation the shadow stack was extended to all register values, not just return addresses. This not only increases security but also performance, reducing the overhead from 17.220% to 13.529%, in the worst-case-scenario. The paper also suggests future improvements that could decrease the overhead even further.