VLSI Architecture for FIR Filter using Radix-4 Booth Multiplier and Common Boolean Logic Adder

A FIR filter is based on the digital filter family can be performed a linear prediction or frequency shaping. The FIR filter is mostly used for an audio and video signal processing applications. Typically, identified expressions with filter coefficients define these filters. By fixing the issues with the current approach and utilizing the CBL to increase speed, the primary goal of this research paper is to design the architecture for 16-tap and 32-tap FIR filters using radix-4 BT based on partition multiplier. Andrew Donald Booth, the inventor, is honored by the name of the BM algorithm. In two's complement notation, it can be described as an algorithm or technique for multiplying binary numbers. This straightforward method of multiplying binary numbers uses the Booth algorithm, which involves repeated addition operations. Radix-4 BM is the name given to this booth algorithm for multiplication operations because it has been further modified. The suggested algorithm is implemented using Vertex device family software from Xilinx.