A 1.99-ps RMS Resolution Time-to-Digital Converter Implemented in a Kintex-7 FPGA

This paper proposes a time-to-digital converter (TDC) based on a delay line and Wave Union method using Xilinx Kintex-7 series FPGA. First, the Wave Union method is employed to achieve fine control over generated pulses, improving the system's time resolution and reducing quantization error. Second, a multi-edge sub-chain encoding module is designed to precisely identify the positions of multi-edge pulses on the delay chain while eliminating bubble errors caused by metastability, thereby enhancing linearity. Finally, a bin-by-bin calibration module based on the code density method is implemented to dynamically calibrate the delay length of delay units affected by temperature and supply voltage variations, ensuring system stability, improving linearity, and reducing nonlinear errors. Experimental results demonstrate that the average time precision of the designed dual-channel Plain TDC, 2-edge TDC, 4-edge TDC, and 6-edge TDC are 6.91 ps, 4.93 ps, 3.19 ps, and 1.99 ps, respectively.