A 94.1dB-DR 40kHz-BW Continuous-Time Delta-Sigma Modulator with Current-reused Amplifiers

This paper presents an energy-efficient continuous-time delta-sigma modulator (CTDSM) with current-reused amplifiers. The third-order single-bit modulator with finite impulse response (FIR) DAC is adopted for its superior linearity performance. In the first integrator, a two-stage hybrid compensated topology is used to achieve high gain and low noise. Meanwhile an inverter-based two-stage amplifier with a class-AB output stage is proposed for second and third integrators, achieving 2× efficiency compared to the conventional one. The proposed modulator was fabricated in 55nm CMOS process with an active area of 0.24mm². Thanks to the current-reused amplifiers, this CTDSM consumes only 133μW from 1.2V supply. Measurement results show that the designed CTDSM achieves 92.6 dB SNDR and 94.1 dB DR over 40kHz bandwidth. The corresponding Schreier figure-of-merit is 177.3 dB.