Design of Cascade and One-Shot Mixed-Mode Recursive Multipliers for GF(2N) Polynomials

Finite field polynomial multiplication for large operand sizes forms the building block for designing modern Cryptography Systems. This work presents two new approaches to realize three-operand multiplier architecture for Galois Field (2^N) polynomial operations, referred to as Cascade and One-Shot Mixed mode configurations. A meta-heuristic approach enabled with a single-objective fitness run was employed to design optimal solutions in the form of non-homogeneous recursive sequences in Karatsuba multiplication, targeted for three-operand multiplication in Galois Field (GF). During the optimization runs, the candidate design solutions were hardware characterized through ASIC process using Cadence Genus tool with 45 nm technology library files. The proposed architectural designs offered improvement in compute-latency of 12.77% and footprint complexity of 61.97% with benefits in the area-delay product (ADP) of 70.72%, and power savings of 83.62% and 51.23% improvement in PPA compared to the existing state-of-the-art (SOTA) designs. All the hardware design files are made freely available for further usage to the designers and researchers community.