Reference Spur Estimation in Integer-N Loop-based Multi-Output Fractional-N Phase Locked Loops due to Charge Pump Mismatch

This work presents a detailed quantitative analysis of the reference spurs in Charge Pump (CP) based multi-output Phase Locked Loops (PLL) caused by a current mismatch in the charge pump. Spur estimation is done using mathematical methods like Fourier series and Narrowband Frequency Modulation (NBFM) approximation. The basics of CP PLLs and the mechanism of reference spur generation are discussed. A behavioral model of a multi-output PLL with an integer-N loop and phase rotatory dividers is built using Verilog-AMS which generates two LO carriers of 1.352 GHz and 587 MHz. The model is simulated in Cadence and the results are post-processed in MATLAB. The simulation results match analytical results with an error of less than 1dBc/Hz.