Compact Modeling of Silicon Carbide (SiC) Power Fets

In this work, we discuss compact modeling strategy for Silicon Carbide (SiC) based FETs using non-linear bias dependent drift resistance in series with low-voltage MOSFET. Our results show that BSIM-BULK HV compact model can capture SiC device characteristics if the parameters are correctly extracted. We provide step-by-step parameter extraction procedure, covering the complete range of operation, from the weak inversion to the strong inversion region, including both low and high drain biases. The model is validated with numerical simulation (TCAD simulation of SiC MOSFET) as well as experimental data from different technologies.