Effect of Pulse Schemes on Multi-Level Switching and Short-Term Instability in 1T1r Configuration

This study investigates the characteristics and shortterm stability of multi-level storage in 1T1R structures under single-pulse and multi-pulse programming schemes with varying step-size. The findings indicate that, due to limitations in the transistor's transfer characteristics, the read current distributions become narrower as the current value increases. The multi-pulse programming scheme enables finer resistance tuning, but there is no significant advantage over the current distribution obtained by the single-pulse scheme at the same current level. Furthermore, the current under the single-pulse scheme exhibits better short-term stability.