Decoupling Polarization and Charges by In-Situ Vmid Extraction for Insight Into Trapping Dynamics of FeMFET

FeMFET is a promising non-volatile memory technology, but in-depth study of the device is complicated by the coupling between polarization switching (PS) and charge trapping (CT). In this work, we developed a novel analysis method by correlating dynamic middle electrode voltage (Vmid) with the DC component of drain current. The extracted Vmid enables accurate charge calculation in the FE capacitor and the transistor part, thus decoupling the PS and the CT process during device writing. The dynamic PS and CT results provide insights into the spatial and temporal properties of interlayer traps, further enabling quantitative modeling of traps with multi-perspective consistency, including trap charges, Id-Vg and MW. The model uniquely identifies the HfO2 trap energy level at $2.25\pm 0.08$ eV below Ec, consistent with other works based on photo-depopulation method or MOSFET BTI reliability analysis. This work offers a novel approach to investigating and modeling the key processes in FeFETs.