Deep Learning Enhanced Thermal Simulation for Efficient Semiconductor Layout Design Using Thermal Twin

This study presents an innovative thermal twin methodology augmented by deep learning for thermal simulation in semiconductor layout co-design. This method integrates deep learning into reduced-order models, resulting in maximum temperature deviations of approximately 2 K for the baseline model and ±5 K when accounting for substrate metal fraction, while significantly reducing computational time to about 1 second, thereby facilitating real-time optimization and enhancing thermal management in high-density power electronics.